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? semiconductor ML9203-XX 1/30 ? semiconductor ML9203-XX 5 7 dot character 16-digit 2-line display controller/driver with character ram general description the ML9203-XX is a 5 7 dot matrix type vacuum fluorescent display tube controller driver ic which displays characters, numerics and symbols of a maximum of 16 digits 2 lines. dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from a micro-controller. a display system is easily realized by internal rom and ram for character display. the ML9203-XX has low power consumption since it is made by cmos process technology. -01 is available as a general-purpose code. custom codes are provided on customer's request. features ? logic power supply (v dd ) : 3.3 v 10% or 5.0 v 10% ? vfd tube drive power supply (v disp ) : 20 to 60 v ? vfd driver output current (vfd driver output can be connected directly to the vfd tube. no pull-down resistor is required.) - segment driver (sega1 to a35, segb1 to b35) only one driver output is high : C5 ma (v disp =60v) all the driver outputs are high : C350 ma (v disp =60v) - segment driver (ada, adb) : C20 ma (v disp =60v) - grid driver (com1 to 16) : C50 ma (v disp =60v) ? content of display sega1 to sega35 and ada - cgrom_a 5 7 dots : 240 types (character data) - cgram_a 5 7 dots : 16 types (character data) - adram_a 16 (display digit) 1 bit (symbol data; can be used for a cursor.) - dcram_a 16 (display digit) 8 bits (register for character data display) segb1 to segb35 and adb - cgrom_b 5 7 dots : 240 types (character data) - cgram_b 5 7 dots : 16 types (character data) - adram_b 16 (display digit) 1 bit (symbol data; can be used for a cursor.) - dcram_b 16 (display digit) 8 bits (register for character data display) ? display control function - display digit : 1 to 16 digits - display duty (brightness adjustment) : 0 to 1024 stages - all lights on/off ? 3 interfaces with microcontroller : da, cs , cp (4 interfaces when reset is added) ? built-in oscillation circuit crystal oscillation or ceralock oscillation : 4.0 mhz (typ) ? package options: 100-pin plastic qfp (qfp100-p-1420-0.65-bk) (product name: ML9203-XXga) e2c0041-19-64 this version: jun. 1999 preliminary
? semiconductor ML9203-XX 2/30 block diagram v disp v dd d-gnd reset da cp cs osc0 osc1 sega1 sega35 ada com1 com16 dcram_a 16w 8b cgrom_a 240w 35b cgram_a 16w 35b adram_b 16w 1b 8bit shift register command decoder control circuit timing generator 1 oscillator digit control duty control grid driver segment driver write address counter read address counter address selector segment driver segb1 segb35 adb dcram_b 16w 8b cgrom_b 240w 35b cgram_b 16w 35b adram_b 16w 1b segment driver segment driver timing generator 2 l-gnd
? semiconductor ML9203-XX 3/30 input and output configuration schematic diagram of logic portion input circuit schematic diagram of driver output circuit l-gnd input v dd l-gnd v dd d-gnd output v disp v disp d-gnd
? semiconductor ML9203-XX 4/30 pin configuration (top view) 100-pin plastic qfp 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 sega15 sega14 sega13 sega12 sega11 sega10 sega9 sega8 sega7 sega6 sega5 sega4 sega3 sega2 sega1 segb1 segb2 segb3 segb4 segb5 segb6 segb7 segb8 segb9 segb10 segb11 segb12 segb13 segb14 segb15 segb16 segb17 segb18 segb19 segb20 segb21 segb22 segb23 segb24 segb25 segb26 segb27 segb28 segb29 segb30 segb31 segb32 segb33 segb34 segb35 v disp ada com9 com10 com11 com12 com13 com14 com15 com16 d-gnd v dd da cp cs reset osc1 osc0 l-gnd d-gnd com8 com7 com6 com5 com4 com3 com2 com1 adb v disp sega16 sega17 sega18 sega19 sega20 sega21 sega22 sega23 sega24 sega25 sega26 sega27 sega28 sega29 sega30 sega31 sega32 sega33 sega34 sega35
? semiconductor ML9203-XX 5/30 pin description 1 to 15, 81 to 100 pin type connects to vfd tube anode electrode drive output. directly connected to fluorescent display tube and a pull-down resistor is not necessary. i oh > C5 ma description symbol vfd tube anode electrode sega1 to a35 o vfd tube grid electrode drive output. directly connected to fluorescent display tube and a pull-down resistor is not necessary. i oh > C50 ma vfd tube grid electrode com1 to 16 o 53 to 60 71 to 78 vfd tube anode electrode drive output. directly connected to fluorescent display tube and a pull-down resistor is not necessary. i oh > C20 ma vfd tube anode electrode ada, adb o 52, 79 v dd 69 l-gnd 62 v disp 51, 80 power supply v dd -l-gnd are power supplies for internal logic. v disp -d-gnd are power supplies for driving fluorescent tubes. apply v disp after v dd is applied. use the same power supply for l-gnd and d-gnd. serial data input (positive logic). input from lsb. micro- controller da i 68 shift clock input. serial data is shifted on the rising edge of cp . micro- controller cp i 67 chip select input. serial data transfer is disabled when cs pin is "h" level. micro- controller cs i 66 reset input. "low" initializes all the functions. initial status is as follows. ? address of each ram ? data of each ram ? display digit ? brightness adjusment ? all lights on or off for a circuit when r and c are connected externally, see application circuit. address "00"h content is undefined 16 digits 0/1024 off mode reset i 65 micro- controller or c, r pins for oscillation. connect crystal and capacitors or ceralock resonator and capacitors . (use a built-in feedback resistor.) set the target oscillation frequency to 4 mhz. for an external circuit, see application circuit. osc0 i 63 osc1 o 64 crystal or ceralock resonator 16 to 50 segb1 to b35 d-gnd 61, 70
? semiconductor ML9203-XX 6/30 absolute maximum ratings parameter supply voltage (1) symbol condition rating unit supply voltage (2) input voltage power dissipation storage temperature output current v dd v disp v in p d t stg i o3 ta 3 25c com1 to com16 ada, adb sega1 to sega35, segb1 to segb35 C0.3 to 6.5 C0.3 to 70 C0.3 to v dd +0.3 764 C55 to 150 C10 to 0.0 v v v mw c C60 to 0.0 C30 to 0.0 ma i o1 i o2 ma ma recommended operating conditions parameter supply voltage (1) symbol condition min. typ. max. unit operating frequency frame frequency operating temperature v dd t op when the power supply voltage is 5v (typ.) oscillation digit=1 to 16, oscillation 4.5 C40 5.0 5.5 85 v c 3.5 213 4.0 244 4.5 275 mhz hz f osc f fr supply voltage (2) v disp 20 60 v when the power supply voltage is 3.3v (typ.) 3.0 3.3 3.6 v
? semiconductor ML9203-XX 7/30 electrical characteristics dc characteristics parameter symbol applied pin condition min. max. unit high level input voltage v ih *1 *1 low level input voltage v ih =v dd v il =0.0v *1 v il i ih i il high level input current low level input current high level output voltage v oh1 v oh2 v oh3 com1 to 16 ada, adb seg1 to 35 v disp =60v, i oh1 =C50ma v disp =60v, i oh2 =C20ma v disp =60v, i oh3 =C5ma low level output voltage 0.7v dd C1.0 C1.0 v disp C1.5 v disp C1.5 v disp C1.5 0.3v dd 1.0 1.0 v v a a v v v (v dd =5.0v10%, or v dd =3.3v10%, v disp =20 to 60v, ta=C40 to +85c, unless otherwise specified) *1 1.0 v v ol1 v dd =5.0v10% v dd =3.3v10% v dd =5.0v10% v dd =3.3v10% 0.8v dd 0.2v dd v v *2 i dd1 i dd2 v dd v dd =5.0v10%, f osc =4.0mhz v dd =3.3v10%, f osc =4.0mhz 6 4 ma ma i disp1 i disp2 v disp all output lights on all output lights off 1 t.b.d ma ma f osc =4.0mhz, no load current consumption *1) cs , cp , da reset *2) sega1 to a35, segb1 to b35, ada, com1 to 16
? semiconductor ML9203-XX 8/30 ac characteristics parameter symbol condition min. max. unit cp pulse width da setup time da hold time cs setup time cs hold time cs wait time data processing time reset pulse width da wait time all output slew rate v dd rise time t cw t ds t dh t css t csh t csw t doff t wres t rsoff t r t prz oscillating state oscillating state t r =20% to 80% t f =80% to 20% when mounted in the unit 300 300 300 300 8 300 4 300 2.0 100 ns ns ns ns m s ns m s ns m s m s cp frequency f c 1.0 mhz when reset signal is input from microcontroller etc. externally 300 ns (v dd =5.0v10%, or v dd =3.3v10%, v disp =20 to 60v, ta=C40 to +85c, unless otherwise specified) t f c l =100pf 2.0 m s v dd off time t pof when mounted in the unit, v dd =0.0v 5.0 ms reset time t rson 300 ns
? semiconductor ML9203-XX 9/30 timing diagram symbol v dd =3.3v10% v dd =5.0v10% v ih 0.8 v dd 0.7 v dd v il 0.2 v dd 0.3 v dd ? data timing ? reset timing v dd reset da t prz t rson t rsoff t pof t wres when external r and c are connected when input externally 0.8 v dd v ih 0.0 v v il v ih v il 0.5 v dd t rsoff = cs cp da t css t ds t dh t doff t cw t cw t csh t csw valid valid valid valid v ih v ih 1/f c v il v il v ih v il ? output timing all outputs t f t r 0.8 v disp 0.2 v disp
? semiconductor ML9203-XX 10/30 ? digit output timing (for 16-digit display, at a duty of 976/1024) com1 com2 com3 com4 com5 com6 com7 com8 com9 com10 com11 com12 com13 com14 com15 com16 ada, adb, sega1 to a35, segb1 to b35 d-gnd t 1 =1024t t 2 =61t t 3 =3t frame cycle display timing blank timing v disp d-gnd v disp t=16/ f osc (t 1 =4.096 ms when f osc =4.0 mhz) (t 2 =240 m s when f osc =4.0 mhz) (t 3 =16 m s when f osc =4.0 mhz)
? semiconductor ML9203-XX 11/30 functional description commands list 1st byte 2nd byte lsb msb lsb msb command 1 dcram_a data write b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 2 3 4 5 6 7 cgram_a data write adram_a data write display duty set number of digits set all lights on/off c0 c1 c2 c3 c4 c5 c6 c7 c0 c5 c10 c15 c20 c25 c30 * c1 c6 c11 c16 c21 c26 c31 * c2 c7 c12 c17 c22 c27 c32 * c3 c8 c13 c18 c23 c28 c33 * c4 c9 c14 c19 c24 c29 c34 * c0******* x0x1x2x31000 x0x1x2x30100 x0x1x2x31100 d0d1**1010 k0k1k2k30110 lh ** 1110 2nd byte 3rd byte 4th byte 5th byte 6th byte * xn cn dn kn h l : don't care : address specification for each ram : character code specification for each ram : display duty specification : number of digits specification : all lights on instruction : all lights off instruction when data is written to ram (dcram, cgram, adram) continuously, addresses are internally incremented automatically. therefore it is not necessary to specify the 1st byte to write ram data for the 2nd and later bytes. note: the test mode is used for inspection before shipment. it is not a user function. 8 d2 d3 d4 d5 d6 d7 d8 d9 9 dcram_b data write x0x1x2x31001 c0 c1 c2 c3 c4 c5 c6 c7 a cgram_b data write c0 c5 c10 c15 c20 c25 c30 * c1 c6 c11 c16 c21 c26 c31 * c2 c7 c12 c17 c22 c27 c32 * c3 c8 c13 c18 c23 c28 c33 * c4 c9 c14 c19 c24 c29 c34 * x0x1x2x30101 2nd byte 3rd byte 4th byte 5th byte 6th byte b adram_b data write c0******* x0x1x2x31101 c d e f 0 test mode
? semiconductor ML9203-XX 12/30 positional relationship between segn and adn (one digit) c0 c0 sega1 c5 sega6 c10 sega11 c15 sega16 c20 sega21 c25 sega26 c30 sega31 c1 sega2 c6 sega7 c11 sega12 c16 sega17 c21 sega22 c26 sega27 c31 sega32 c2 sega3 c7 sega8 c12 sega13 c17 sega18 c22 sega23 c27 sega28 c32 sega33 c3 sega4 c8 sega9 c13 sega14 c18 sega19 c23 sega24 c28 sega29 c33 sega34 c4 sega5 c9 sega10 c14 sega15 c19 sega20 c24 sega25 c29 sega30 c34 sega35 corresponds to the 2nd byte of the adram_a data write command. corresponds to the 6th byte of the cgram_a data write command. corresponds to the 5th byte of the cgram_a data write command. ada corresponds to the 4th byte of the cgram_a data write command. corresponds to the 3rd byte of the cgram_a data write command. corresponds to the 2nd byte of the cgram_a data write command. c0 c0 segb1 c5 segb6 c10 segb11 c15 segb16 c20 segb21 c25 segb26 c30 segb31 c1 segb2 c6 segb7 c11 segb12 c16 segb17 c21 segb22 c26 segb27 c31 segb32 c2 segb3 c7 segb8 c12 segb13 c17 segb18 c22 segb23 c27 segb28 c32 segb33 c3 segb4 c8 segb9 c13 segb14 c18 segb19 c23 segb24 c28 segb29 c33 segb34 c4 segb5 c9 segb10 c14 segb15 c19 segb20 c24 segb25 c29 segb30 c34 segb35 corresponds to the 2nd byte of the adram_b data write command. corresponds to the 6th byte of the cgram_b data write command. corresponds to the 5th byte of the cgram_b data write command. adb corresponds to the 4th byte of the cgram_b data write command. corresponds to the 3rd byte of the cgram_b data write command. corresponds to the 2nd byte of the cgram_b data write command. comn
? semiconductor ML9203-XX 13/30 data transfer method and command write method display control command and data are written by an 8-bit serial transfer. write timing is shown in the figure below. setting the cs pin to "low" level enables a data transfer. data is 8 bits and is sequentially input into the da pin from lsb (lsb first). as shown in the figure below, data is read by the shift register at the rising edge of the shift clock, which is input into the cp pin. if 8-bit data is input, internal load signals are automatically generated and data is written to each register and ram. therefore it is not necessary to input load signals from the outside. setting the cs pin to "high" disables data transfer. data input from the point when the cs pin changes from "high" to "low" is recognized in 8-bit units. * when data is written to ram (dcram, adram, cgram) continuously, addresses are internally incremented automatically. therefore it is not necessary to specify the 1st byte to write ram data for the 2nd and later bytes. reset function reset is executed when the reset pin is set to "l", (when turning power on, for example) and initializes all functions. initial status is as follows. ? address of each ram .................. address "00"h ? data of each ram ........................ all contents are undefined ? display digit .................................. 16 digits ? brightness adjustment ................. 0/1024 ? all display lights on or off ..... off mode ? segment output ............................ all segment outputs go "low" ? ad output ..................................... all ad outputs go "low" please set again according to "setting flowchart" after reset. t doff b0 lsb cs cp da b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 msb 1st byte lsb msb 2nd byte when data is written to dcram* command and address data t csh b0 b1 b2 b3 b4 b5 b6 b7 lsb msb 2nd byte character code data of the next address character code data
? semiconductor ML9203-XX 14/30 description of commands and functions 1. dcram data write (specifies the address of dcram and writes the character code of cgrom and cgram.) dcram (data control ram) has a 4-bit address to store character code of cgrom and cgram. the character code specified by dcram is converted to a 5 7 dot matrix character pattern via cgrom or cgram. (the dcram can store 16 characters.) [command format] x0 x1 x2 x3 1 0 0 0/1 b0 b1 b2 b3 b4 b5 b6 b7 1st byte (1st) lsb msb c0 c1 c2 c3 c4 c5 c6 c7 b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (2nd) lsb msb : selects dcram data write mode and specifies dcram address (ex: specifies dcram address 0h) : specifies character code of cgrom and cgram ( written into dcram address 0h ) 0: select dcram_a 1: select dcram_b to specify the character code of cgrom and cgram continuously to the next address, specify only character code as follows. the addresses of dcram are automatically incremented. specification of an address is unnecessary.
? semiconductor ML9203-XX 15/30 c0 c1 c2 c3 c4 c5 c6 c7 b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (3rd) lsb msb c0 c1 c2 c3 c4 c5 c6 c7 b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (4th) lsb msb : specifies character code of cgrom and cgram (written into dcram address 1h) : specifies character code of cgrom and cgram (written into dcram address 2h) b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (17th) lsb msb c0 c1 c2 c3 c4 c5 c6 c7 b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (18th) lsb msb : specifies character code of cgrom and cgram (written into dcram address fh) : specifies character code of cgrom and cgram (dcram address 0h is rewritten) c0 c1 c2 c3 c4 c5 c6 c7 x0 (lsb) to x3 (msb): dcram addresses (4 bits: 16 characters) c0 (lsb) to c7 (msb): character code of cgrom and cgram (8 bits: 256 characters) [com positions and set dcram addresses] hex x0 com x1 x2 x3 0 0000 com1 1 1000 com2 2 0100 com3 3 1110 com4 4 0010 com5 5 1010 com6 6 0110 com7 7 1110 com8 8 0001 com9 9 1001 com10 a 0101 com11 b 1101 com12 c 0011 com13 d 1011 com14 e 0111 com15 f 1111 com16 position
? semiconductor ML9203-XX 16/30 c0 c5 c10 c15 c20 c25 c30 * b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (2nd) lsb msb : specifies 1st column data (rewritten into cgram address 00h) c1 c6 c11 c16 c21 c26 c31 * b0 b1 b2 b3 b4 b5 b6 b7 3rd byte (3rd) lsb msb : specifies 2nd column data (rewritten into cgram address 00h) x0 x1 x2 x3 0 1 0 0/1 b0 b1 b2 b3 b4 b5 b6 b7 1st byte (1st) lsb msb : selects cgram data write mode and specifies cgram address. (ex: specifies cgram address 00h) c2 c7 c12 c17 c22 c27 c32 * b0 b1 b2 b3 b4 b5 b6 b7 4th byte (4th) lsb msb : specifies 3rd column data (rewritten into cgram address 00h) c3 c8 c13 c18 c23 c28 c33 * b0 b1 b2 b3 b4 b5 b6 b7 5th byte (5th) lsb msb : specifies 4th column data (rewritten into cgram address 00h) c4 c9 c14 c19 c24 c29 c34 * b0 b1 b2 b3 b4 b5 b6 b7 6th byte (6th) lsb msb : specifies 5th column data ( rewritten into cgram address 00h ) 0: select cgram_a 1: select cgram_b to specify character pattern data continuously to the next address, specify only character pattern data as follows. the addresses of cgram are automatically incremented. specification of an address is unnecessary. the 2nd to 6th byte (character pattern data) are regarded as one data item, so 300 ns is sufficient for t doff time between bytes. 2. cgram data write (specifies the addresses of cgram and writes character pattern data.) cgram (character generator ram) has a 4-bit address to store 5 7 dot matrix character patterns. a character pattern stored in cgram can be displayed by specifying the character code (address) by dcrom. the address of cgram is assigned to 00h to 0fh. (all the other addresses are the cgrom addresses.) (the cgram can store 16 types of character patterns.) [command format]
? semiconductor ML9203-XX 17/30 c0 c5 c10 c15 c20 c25 c30 * b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (7th) lsb msb : specifies 1st column data (rewritten into cgram address 01h) c4 c9 c14 c19 c24 c29 c34 * b0 b1 b2 b3 b4 b5 b6 b7 6th byte (11th) lsb msb : specifies 5th column data (rewritten into cgram address 01h) x0 (lsb) to x3 (msb): cgram addresses (3 bits: 8 characters) c0 (lsb) to c34 (msb) : character pattern data (35 bits: 35 outputs per digit) * : don't care [cgrom addresses and set cgram addresses] refer to rom code tables. hex x0 cgrom address x1 x2 0 000 ram00(00000000b) 1 100 ram01(00000001b) 2 010 ram02(00000010b) 3 110 ram30(00000011b) 4 001 ram04(00000100b) 5 101 ram05(00000101b) 6 011 ram06(00000110b) 7 111 ram70(00000111b) x3 0 0 0 0 0 0 0 0 hex x0 cgrom address x1 x2 8 000 ram08(00001000b) 9 100 ram09(00001001b) a 010 ram0a(00001010b) b 110 ram0b(00001011b) c 001 ram0c(00001100b) d 101 ram0d(00001101b) e 011 ram0e(00001110b) f 111 ram0f(00001111b) x3 1 1 1 1 1 1 1 1
? semiconductor ML9203-XX 18/30 positional relationship between the output area of cgram note: cgrom_a and cgrom_b (character generator rom a, b) have an 8-bit address to generate 5 7 dot matrix character patterns. each of cgrom_a and cgrom_b can store 240 types of character patterns. the contents of cgrom_a and cgrom_b can be set separately. general-purpose code -01 is available (see rom code tables) and custom codes are provided on customer's request. c0 segn1 c5 segn6 c10 segn11 c15 segn16 c20 segn21 c25 segn26 c30 segn31 c1 segn2 c6 segn7 c11 segn12 c16 segn17 c21 segn22 c26 segn27 c31 segn32 c2 segn3 c7 segn8 c12 segn13 c17 segn18 c22 segn23 c27 segn28 c32 segn33 c3 segn4 c8 segn9 c13 segn14 c18 segn19 c23 segn24 c28 segn29 c33 segn34 c4 segn5 c9 segn10 c14 segn15 c19 segn20 c24 segn25 c29 segn30 c34 segn35 area that corresponds to 2nd byte (1st column) (input 1000001*b) area that corresponds to 3rd byte (2nd column) (input 1010101*b) area that corresponds to 4th byte (3rd column) (input 1001001*b) area that corresponds to 5th byte (4th column) (input 1100011*b) area that corresponds to 6th byte (5th column) (input 1100011*b) c5 segn6 c10 segn11 c15 segn16 c20 segn21 c25 segn26 c11 segn12 c16 segn17 c21 segn22 c7 segn8 c17 segn18 c27 segn28 c8 segn9 c13 segn14 c23 segn24 c28 segn29 c14 segn15 c19 segn20 c24 segn25
? semiconductor ML9203-XX 19/30 to specify symbol data continuously to the next address, specify only character data as follows. the address of adram is automatically incremented. specification of addresses is unnecessary. 3. adram data write (specifies address of adram and writes symbol data) adram (additional data ram) has a 1-bit address to store symbol data. symbol data specified by adram is directly output without cgrom and cgram. (the adram can store 1 type of symbol patterns for each digit.) the terminal to which the contents of adram are output can be used as a cursor. [command format] c0******* b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (2nd) lsb msb : sets symbol data ( written into adram address 0h ) x0 x1 x2 x3 1 1 0 0/1 b0 b1 b2 b3 b4 b5 b6 b7 1st byte (1st) lsb msb : selects adram data write mode and specifies adram address (ex: specifies adram address 0h) 0: select adram_a 1: select adram_b c0******* b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (3rd) lsb msb : sets symbol data (written into adram address 1h) c0******* b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (4th) lsb msb : sets symbol data (written into adram address 2h) c0******* b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (17th) lsb msb : sets symbol data (written into adram address fh) c0******* b0 b1 b2 b3 b4 b5 b6 b7 2nd byte (18th) lsb msb : sets symbol data ( adram address 0h is rewritten. ) x0 (lsb) to x3 (msb) : adram addresses (4 bits: 16 characters) c0 : symbol data (1 bit: 1-symbol data per digit) * : don't care
? semiconductor ML9203-XX 20/30 [com positions and adram addresses] hex x0 com x1 x2 x3 0 0000 com1 1 1000 com2 2 0100 com3 3 1100 com4 4 0010 com5 5 1010 com6 6 0110 com7 7 1110 com8 8 0001 com9 9 1001 com10 a 0101 com11 b 1101 com12 c 0011 com13 d 1011 com14 e 0111 com15 f 1111 com16 position
? semiconductor ML9203-XX 21/30 5. display duty set (writes display duty value to duty cycle register) display duty adjusts brightness in 1024 stages using 10-bit data. when power is turned on or when the reset signal is input, the duty cycle register value is "0". always execute this instruction before turning the display on, then set a desired duty value. [command format] d0 (lsb) to d9 (msb) : display duty data (10 bits: 1024 stages) * : don't care [relation between setup data and controlled com duty] d0d1**1010 b0 b1 b2 b3 b4 b5 b6 b7 1st byte lsb msb : selects display duty set mode and sets duty value (lower 2 bits) d2 d3 d4 d5 d6 d7 d8 d9 b0 b1 b2 b3 b4 b5 b6 b7 2nd byte ( 2nd ) lsb msb : sets duty value (upper 8 bits) hex d0 d1 d2 com duty 000 0 0 0 0/1024 001 1 0 0 1/1024 002 0 1 0 2/1024 3ce 0 1 1 974/1024 3cf 1 1 1 975/1024 3d0 0 0 0 976/1024 3d1 1 0 0 976/1024 3ff 1 1 1 976/1024 d3 0 0 0 1 1 0 0 1 d4 0 0 0 0 0 1 1 1 d5 0 0 0 0 0 0 0 1 d6 0 0 0 1 1 1 1 1 d7 0 0 0 1 1 1 1 1 d8 0 0 0 1 1 1 1 1 d9 0 0 0 1 1 1 1 1 the state when p ower is turned on or when reset si g nal is in p ut.
? semiconductor ML9203-XX 22/30 6. number of digits set (writes the number of display digits to the display digit register) the number of digits set can display 1 to 16 digits using 4-bit data. when power is turned on or when a reset signal is input, the number of digit register value is "0". always execute this instruction to change the number of digits before turning the dispaly on. [command format] k0 (lsb) to k3 (msb) : number of digit data (4 bits: 16 digits) * : don't care [relation between setup data and controlled com] k0k1k2k30110 b0 b1 b2 b3 b4 b5 b6 b7 1st byte lsb msb : selects the number of digit set mode and specifies the number of digit value hex k0 k1 k2 number of digits of com 0 0 0 0 com1 to 16 1 1 0 0 com1 2 0 1 0 com1 to 2 3 1 1 0 com1 to 3 4 0 0 1 com1 to 4 5 1 0 1 com1 to 5 6 0 1 1 com1 to 6 7 1 1 1 com1 to 7 k3 0 0 0 0 0 0 0 0 hex k0 k1 k2 number of digits of com 0 0 0 0 com1 to 8 1 1 0 0 com1 to 9 2 0 1 0 com1 to 10 3 1 1 0 com1 to 11 4 0 0 1 com1 to 12 5 1 0 1 com1 to 13 6 0 1 1 com1 to 14 7 1 1 1 com1 to 15 k3 1 1 1 1 1 1 1 1 the state when power is turned on or when reset signal is input.
? semiconductor ML9203-XX 23/30 7. all display lights on/off set (turns all dispaly lights on or off) all display lights on is used primarily for display testing. all display lights off is primarily used for display blink and to prevent malfunction when power is turned on. [command format] lh**1110 b0 b1 b2 b3 b4 b5 b6 b7 1st byte lsb msb : selects all display lights on or off mode l, h: display operation data *: don't care [set data and display state of seg and ad] h 0 0 1 1 normal display sets all outputs to low sets all outputs to high sets all outputs to high display state of seg and ad l 0 1 0 1 (the state when power is applied or when reset is input.)
? semiconductor ML9203-XX 24/30 setting flowchart (power applying included) apply v disp all display lights off number of digits setting display duty setting cgram_a or b data write mode (with address setting) cgram_a or b character code cgram is character code write ended? another ram to be set? releases all display lights off mode adram_a or b data write mode (with address setting) adram_a or b character code adram is character code write ended? dcram_a or b data write mode (with address setting) dcram_a or b character code dcram is character code write ended? select a ram to be used status of all outputs by reset signal input display operation mode address is automatically incremented no no no yes yes yes yes end of setting address is automatically incremented address is automatically incremented apply v dd no
? semiconductor ML9203-XX 25/30 power-off flowchart display operation mode turn off v dd turn off v disp
? semiconductor ML9203-XX 26/30 application circuit notes: 1. the v dd value depends on the power supply voltage of the microcontroller used. adjust the values of the constants and c input to reset to the power supply voltage used. 2. the v disp value depends on the fluorescent display tube used. adjust the values of the constants r 2 and zd to the power supply voltage used. msm9203-xx mcu 16 35 35 reset v dd com1-16 sega1-a35 segb1-b35 v dd gnd c osc0 osc1 l-gnd d-gnd da cp cs output ports v dd 5 7-dot matrix fluorescent display tube grid (digit) anode (segment) anode (segment) r r 2 zd 2 ada,adb v disp anode (segment) v disp cr y stal oscillator or ceraloc oscillator
? semiconductor ML9203-XX 27/30 reference data the figure below shows the relationship between the v disp voltage and the output current of each driver. take care that the total power consumption to be used does not exceed the power dissipation. C60 C50 C40 C30 C20 C10 0 0 1020304050 [output current] [v disp voltage] (v) [v disp voltage-output current of each driver] 70 60 (ma) t.b.d
? semiconductor ML9203-XX 28/30 ml9203-01 cgrom_a code 00000000b (00h) to 00000111b (0fh) are the cgram_a addresses. 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ram00 ram01 ram02 ram03 ram04 ram05 ram06 ram07 msb lsb ram08 ram09 ram0a ram0b ram0c ram0d ram0e ram0f
? semiconductor ML9203-XX 29/30 ml9203-01 cgrom_b code 00000000b (00h) to 00000111b (0fh) are the cgram_b addresses. 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ram00 ram01 ram02 ram03 ram04 ram05 ram06 ram07 msb lsb ram08 ram09 ram0a ram0b ram0c ram0d ram0e ram0f
? semiconductor ML9203-XX 30/30 (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, tqfp, lqfp, soj, qfj (plcc), shp, and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp100-p-1420-0.65-bk package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 1.29 typ. mirror finish
notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third partys industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third partys right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents cotained herein may be reprinted or reproduced without our prior permission. 9. ms-dos is a registered trademark of microsoft corporation. copyright 1999 oki electric industry co., ltd. printed in japan e2y0002-29-11

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